PhD in Reconfigurable & Spatial Accelerators for heterogeneous ICT systems

Are you excited by next-gen computing systems? Join us to develop methodologies and programming tools to make reconfigurable/spatial architectures (FPGAs, CGRAs, and ML Accelerators) first-class citizens of future ICT systems.

PhD in Reconfigurable & Spatial Accelerators for Heterogeneous ICT Systems

Our research team invites applications for a fully-funded PhD position at the intersection of reconfigurable computing, accelerators, and simulation tools. This position aims to investigate strategies for programming, modeling, and integrating reconfigurable/spatial architectures, such as FPGAs and ML accelerators, within heterogeneous ICT ecosystems.

Reconfigurable and spatial hardware, such as FPGAs, CGRAs, and many Machine Learning accelerators, offer significant opportunities for improving performance and energy efficiency compared to traditional CPUs/GPUs. Yet, porting and optimizing code for these architectures remains a key challenge. This project will explore how reconfigurable/spatial computing devices can be integrated into large-scale heterogeneous infrastructures, which include CPUs, GPUs, DPUs, and others. The research will focus on productive tools for easier development of spatial accelerator-friendly applications and on addressing the complexity of the device-software-application-data design space, enabling systematic and efficient exploration using modeling and simulation tools.

Your responsibilities

As a PhD student, you will develop and lead original research within the broad theme of reconfigurable and spatial computing. Your work will combine theoretical investigation, software design and development, and experimental validation. Specifically, you will:

• Identify and characterize kernels and application domains that benefit from reconfigurable/spatial devices, build microbenchmarks and performance/energy models.
• Investigate what techniques and abstractions are most effective for designing and optimizing applications for spatial devices (HW/SW co-design).
• Develop and extend simulation or modeling frameworks to support systematic exploration of mapping and scheduling strategies across CPUs, GPUs, DPUs, and reconfigurable/spatial devices.
• Demonstrate seamless deployment of hybrid workflows in large‑scale, heterogeneous infrastructures.

As part of this position, you will be encouraged and supported to define and drive your own research directions within the project scope, publish and present your findings at top-tier systems and HPC venues, develop and maintain open-source software, contribute to teaching and community outreach, and be involved in an industrial/academic consortium (the FNS 6G project). The ultimate goal is for the successful candidate to produce a dissertation leading to a PhD degree after 4 years.

Your profile

We offer a fully funded PhD position for 4 years. We are looking for a highly motivated candidate who meets the following qualifications:

• A Master’s degree in Computer Science or Computer Engineering (completed before the start date of the PhD).
• Strong academic background and competencies in parallel programming, distributed computing, and performance engineering.
• Familiarity with accelerator programming (e.g., GPU), hardware programming, high-level synthesis tools, and reconfigurable/spatial computing architectures (e.g., FPGA, AMD AI Engine, Tenstorrent) is recommended.
• Familiarity with computing simulation tools is a plus.
• Excellent oral and written communication skills in English.
• Strong organizational skills and the ability to work both independently and as part of a team.
• Proactive and enthusiastic about addressing cutting-edge computing systems research challenges.

What we offer

A challenging position in a socially engaged organisation. At VU Amsterdam, you contribute to education, research and service for a better world. And that is valuable. So in return for your efforts, we offer you:

• A salary of € 3.059,00 (PhD) and maximum € 3.881,00 (PhD) gross per month in the fourth year, for a full-time employment
• An employment contract of initially 18 months. If there is sufficient perspective, this will be extended to a total of 4 years. Your dissertation at the end of the fourth year forms the end of your employment contract.

We also offer you attractive fringe benefits and arrangements. Some examples:

• A full-time 38-hour working week comes with a holiday leave entitlement of 232 hours per year. If you choose to work 40 hours, you have 96 extra holiday leave hours on an annual basis. For part-timers, this is calculated pro rata.
• 8% holiday allowance and 8.3% end-of-year bonus
• Contribution to commuting expenses
• A wide range of sports facilities which staff may use at a modest charge
• Optional model for designing a personalized benefits package

About the project and group

This position is funded within the context of the “Future Network Services: 6G” project. A unique Dutch alliance, comprising 60 leading ICT businesses, mobile operators, semiconductor manufacturers, and research institutions, has united to spearhead the development of specific aspects of 6G: Software antennas, AI-driven network software, compute stack, and groundbreaking 6G Applications.

The candidate will be embedded in the Massivizing Computer Systems (MCS) group, which focuses on research in distributed computing systems and ecosystems, and currently spans over 40 diverse people, of which 3 are staff. The group aims to contribute to solving high-challenge, high-impact scientific and societal challenges, and has much international and national visibility in research and education in computing systems. The group chair, Prof. Iosup, has received prestigious national awards for both research and education, and has been inducted in the (Young) Royal Netherlands Academy of Arts and Sciences. Dr. Tiziano De Matteis (who will be co-supervisor), is an Assistant Professor in the group. His interests are on Parallel and Distributed Computing with a focus on systems and programming models for spatial and reconfigurable computing for HPC, post-Moore architectures, and sustainability in modern computing systems. The MCS group has a central role in organizing the national and international computer systems communities, and has played leading roles in organizing top-tier conferences (e.g., HPDC, ICPE, CCGRID) and journals (e.g., IEEE TPDS). The MCS group publishes in high-quality conferences, journals, and magazines, and has an outsized presence in conducting grand experiments and in releasing FAIR data and software artifacts. The group has long-lasting links with national and international organizations, and plays a leading role in international academic-industrial partnerships, such as the SPEC Research Group and the LDBCouncil. Last, but not least, the MCS group has a sustained and leading presence in developing young talent through individual supervision and embedding in large, cross-disciplinary, international teams.