PhD Position in High-Performance CMOS Phase-Locked Loop Design

Join the ERC Synergy DISRUPT project to reinvent PLL architectures for next-generation wireless communication. Design ultra-low-jitter, low-spur PLLs and validate them on real silicon.

PhD Position in High-Performance CMOS Phase-Locked Loop Design

Why this position is important

Future wireless communication systems demand frequency synthesizers with extremely low jitter, low spurious emissions, and strong robustness against disturbances such as frequency pushing and pulling. Phase-locked loops (PLLs) are a fundamental component of nearly all wireless transceivers, but existing architectures face increasing challenges in meeting the performance requirements of next-generation systems.

This position is part of the ERC Synergy DISRUPT project, which aims to fundamentally rethink PLL architectures and develop new circuit techniques that significantly improve spectral purity, robustness, and efficiency. The research will contribute to advancing the state of the art in frequency synthesis and enabling more reliable, high-performance wireless communication technologies.

What you will do

In this role, you will explore and develop innovative PLL architectures and their key building blocks. Your work will include system-level modeling, architectural exploration, transistor-level circuit design, and detailed simulation and verification. You will translate new architectural concepts into integrated circuit implementations and evaluate their performance through measurements on fabricated silicon chips.

You will contribute to multiple stages of the design cycle, from concept development and modeling to circuit implementation and experimental validation. The work provides a unique opportunity to see advanced circuit ideas realized and tested on real silicon.

How you will work

Your research will combine theoretical analysis, behavioral modeling, and practical integrated circuit design. You will use advanced CAD tools for system and circuit simulation, apply modern analog/RF design methodologies, and participate in measurement and characterization of prototype chips.

The project encourages creative thinking and architectural innovation while maintaining a strong link to practical implementation and experimental verification.

With whom you will work

You will be supervised by Masoud Babaie and Robert Bogdan Staszewski and will be part of the ELCA (Electronic Circuits and Architectures) group in the Microelectronics Department. The ELCA group conducts world-leading research in RF and mixed-signal integrated circuits for wireless communication systems.

You will work closely with PhD students, postdoctoral researchers, and senior scientists within the ERC Synergy DISRUPT project, and collaborate with international academic partners involved in the project. The position offers a highly collaborative and stimulating research environment at the forefront of integrated circuit innovation.

Job requirements

Essential requirements:

• M.Sc. degree in Microelectronics, Electrical Engineering, or a closely related field.
• Strong background in analog, mixed-signal, and RF circuit design.
• Hands-on RTL design experience (SystemVerilog, Verilog, or Verilog-AMS).
• Demonstrable creativity and originality in problem solving and circuit design.
• Good presentation, writing, and communication skills.
• Strong command of English (spoken and written).
• Ability to work effectively in an international and collaborative research environment.
• Strong team player with excellent communication skills to collaborate smoothly with international colleagues.

Nice to have

• Prior tape-out experience.
• Familiarity with the digital back-end flow, including synthesis, place-and-route, and timing closure.

Conditions of employment

Doctoral candidates will be offered a 4-year period of employment in principle, but in the form of 2 employment contracts: an initial 1.5 year contract with an official go/no go progress assessment within 15 months, followed by an additional contract for the remaining 2.5 years assuming everything goes well and performance requirements are met.

As a PhD candidate you will be enrolled in the TU Delft Graduate School. The TU Delft Graduate School provides an inspiring research environment with an excellent team of supervisors, academic staff and a mentor. The Doctoral Education Programme is aimed at developing your transferable, discipline-related and research skills.

The TU Delft offers a customisable compensation package, discounts on health insurance, and a monthly work costs contribution. Flexible work schedules can be arranged.

TU Delft (Delft University of Technology)

Delft University of Technology is a top international university combining science, engineering and design. It delivers world class results in education, research and innovation to address challenges in the areas of energy, climate, mobility, health and digital society.

Faculty of Electrical Engineering, Mathematics and Computer Science

The Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS) brings together three scientific disciplines. Combined, they reinforce each other and are the driving force behind the technology we all use in our daily lives. The faculty develops sustainable energy systems, chips and sensors of the future, and software technologies for next-generation equipment, including AI, while also advancing applied mathematics. More than 1000 employees and 4,000 students work and study in this innovative environment.