ESA Graduate Trainee in Space Microelectronics Engineering

Our team and mission

The Data Systems, Microelectronics and Component Technology Division carries out all the tasks related to ESA project support and technology development activities in its area of responsibility. This includes on-board computers and datahandling systems (such as mass memories and instrument control units) for payloads and platforms, microelectronics (such as FPGAs and ASICs), Artificial Neural Networks, AI and Machine learning, cubesat activities, wireless technologies and all technologies related to the EEE component family (such as Si, photonics, passives). In terms of technology development, we seek to develop state-of-the-art technologies to support future ESA space missions in space science, Earth observation, human spaceflight, telecommunication, navigation, space transportation, operations and space engineering and technology.

The candidate will be integrated into the Data Systems, Microelectronics & Component Technology Division at ESTEC and will work in the Microelectronics Section.

The Microelectronics Section’s core responsibilities cover technical support for ESA missions and research activities in the areas of:

• digital and analogue integrated circuit (application-specific integrated circuit (ASIC), field programmable gate array (FPGA), microprocessor) and intellectual property (IP) core developments for space applications;
• tools and methods for the development of integrated circuits (from specifications to tested devices);
• radiation mitigation techniques for ASIC and FPGA.

Field(s) of activity/research for the traineeship

The proposed activity will investigate the implementation, profiling, verification and validation of state-of-the-art spacecraft communication, monitoring and control, signal processing and/or artificial intelligence algorithms on existing and specifically on the Ultra Deep SubMicron (UDSM) technology System on Chip (SoC) platform including multi-core RISC-V processors and/or Field Programmable Gate Arrays (FPGAs) under development.

The application for implementation will be selected to be representative of future space high performance applications in the field of autonomous operation in space science and exploration, and high-performance data processing for Earth observation, and telecommunications.

You will complement functionally representative test cases for the chosen application for the quantative profiling, verification and validation running on the accelerated simulation platform to support the continuous integration and deployment of the application for future UDSM SoC platforms.

The work will implement the application on the UDSM SoC through the compilation of the application onto the synthesised multi-core RISC-V processors and/or high level synthesis on the next generation FPGAs. Quantative profiling will be conducted to identify performance bottlenecks to be addressed through algorithm, IP and tool optimisations. The profiling will include the application supporting IP for the RISC-V cores and/or FPGAs in the UDSM SoC.

The best application solution will be identified by exploring different architectural (RISC-V core and FPGA fabric) alternatives for the SoC with the aid of the accelerated simulation platform, which serves as the application prototype. The trade-off will cover the different application implementation strategies including synthesis options, different FPGA fabric, RISC-V extensions and coarse grain and streaming accelerators. The best solution will be compared with implementations on existing space-qualified FPGAs, RISC-V processors and COTS SoCs.

Technical competencies

Knowledge of relevant technical/functional domains

Relevant experience gained during internships, project work and/or extracurricular or other activities

General knowledge of the space sector and relevant activities

Knowledge of ESA and its programmes/projects

Behavioural competencies

Result Orientation

Operational Efficiency

Fostering Cooperation

Relationship Management

Continuous Improvement

Forward Thinking

Education

You should have just completed, or be in the final year of your master’s degree in physics, microelectronics, electronics or equivalent.

Additional requirements

Specific competence in one of the following disciplines shall be considered an asset:

• Implementation, verification and validation of microelectronics on HW platform (for space or terrestrial applications).
• Experience with the implementation of digital signal processing and/or artificial intelligence algorithms.
• Experience with hardware description languages or modelling software.
• Experience with microelectronics development tool flow.

You should have good interpersonal and communication skills and should be able to work in a multicultural environment, both independently and as part of a team. Previous experience of working in international teams can be considered an asset. Your motivation, overall professional perspective and career goals will also be explored during the later stages of the selection process.

Diversity, Equity and Inclusiveness
ESA is an equal opportunity employer, committed to achieving diversity within the workforce and creating an inclusive working environment. We therefore welcome applications from all qualified candidates irrespective of gender, sexual orientation, ethnicity, beliefs, age, disability or other characteristics. Applications from women are encouraged.

At the Agency we value diversity, and we welcome people with disabilities. Whenever possible, we seek to accommodate individuals with disabilities by providing the necessary support at the workplace.

Important Information and Disclaimer
Applicants must be eligible to access technology and hardware which is subject to European and US export control regulations.

During the recruitment process, the Agency may request applicants to undergo selection tests. Additionally, successful candidates will need to undergo basic screening before appointment, which will be conducted by an external background screening service, in compliance with the European Space Agency's security procedures.