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Architect Overlay Reference & Control

Geplaatst 25 mrt. 2024
Werkervaring
5 tot 7 jaar
Full-time / part-time
Full-time
Soort opleiding
Taalvereisten
Engels (Vloeiend)
Nederlands (Vloeiend)

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Introduction

If you have the strength of personality to take ownership of a problem and create a vision of how to solve it – a vision that also inspires others - then the ASML Overlay Reference and Control group, providing overlay reference to all ASML scanners, is your ideal environment for personal development and professional growth.

Job Mission

ASML builds lithography systems that can place multiple layers on a chip with very high precision (overlay). The overlay accuracy demand is determined by design of the chip. To setup systems for overlay special “rulers” are needed. These rulers are called Overlay reference wafers and reticles. To make them, position of marks on the wafers is determined with the accuracy of 0.3nm and stored in ‘Wafer Error Correction’ (WEC) files. As “WEC architect”, you have full technical responsibility for the delivery of WEC, and to guarantee the measurement quality and high yield of the wafer production at ASML factory. You do this by combining your physics thinking and complex data analysis.

Job Description

  • Responsible for the WEC design, including definition and documentation
  • Responsible for defining Key Performance Indicators to secure WEC measurement quality
  • Contribute to the ASML overlay roadmap via alignment with System Engineering
  • Create work breakdown, test flow (PERT) and effort estimates
  • Make the organization aware of risks and speak up/escalate in case of quality issues
  • Use statistical methods to show improvements or issues.
  • Support the internal and external customers in solving WEC-related issues.
  • Give technical steering to the WEC team and delegate work to team members
  • Supervise and coach WEC team on the technical skills and knowledge.
  • Support the team in developing WEC algorithms and Matlab functions.
  • Responsible for defining way of working to release and maintain Matlab tooling
  • Interface to architects in other projects and to System Engineering

Education

Technical University masters, preferably PhD, in physics, mathematics or similar

Experience

  • Experienced architect or a bright Sr. Design engineer with clear architect potential and ambition.
  • Expert in Matlab, data analysis, and statistics
  • Experience with mentoring of team members
  • System / scanner knowledge in the area of overlay is a plus

Personal skills

  • Curiosity, creativity, initiative, discipline and team spirit.
  • Strong analytical ability with a pragmatic and pro-active attitude.
  • Good communication skills and good command of English language.

Context of the position

Within ASML, the sector Development & Engineering is responsible for specification and design of ASML products. The department DUV System Performance is responsible for specification definition, and qualification of functional modules & machine/customer applications on spec, within time and budget in the areas of overlay, imaging, focus and productivity. You will be working in a multidisciplinary project team, in a dynamic and high-tech environment.

BE PART OF PROGRESS
We make machines that make chips; the hearts of the devices that keep us informed, entertained and safe. Our key technology is the lithography system, which brings together high-tech hardware and advanced software to control the chip manufacturing process. All of the world’s top chipmakers like Samsung, Intel and TSMC use our technology, enabling the waves of innovation that help tackle the world’s toughest challenges.

Engineering
Veldhoven
20.000 medewerkers

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